GGSIPU B.tech 5th sem 1st Term Previous year Paper DCS-II

                                           First term Examination

                                                  V Semester[B.Tech]

 

Paper code ETEC-301                                                                  Time :90 min

Subject :DCS-I1                                                                               Max Marks 30

Note: Attempt Q1 and any two more.

Ql .a) What is difference between dataflow and behavioral modeling. 2

     b) What is basic difference between Melay and Moore machine? 2

   C) Ilistinguish Constants, Variablc and Signals. 2

     d) Write VFIDL code for 4: 1 Mus using structural modeling. 3

     c) Writc the diff'crcncc between ASM chart and I:lo\v chart. 1

Q2.a) LVhat are signal drivers'? What is effect oftranspol-t delay and 5

         Internal delay on the signal drivers?

    b) Write VHDL code for traffic -Light operation which contains input as 3

       Sensors and clock. Outputs are red, green and yellow light.

.   c) Explain the significance of process in VHDL. 2

Q3.a) Design a binary multiplier and write VHDL code for the binary 6

          Multiplier circuit.

      b) Explain the following 4

         i) Component instantiation

         ii)Component declaration

         iii)Signal assignment statement

         iv)Package declaration

Q4.a) Write VHDL code for 4-bit ~ r i t h ~ n e iliocg ical unit (ALU). 5

     b) Draw the state diagram and ASM chart for the synchronous 5.

Circuit having following description:- ,

i) The ciriuit has c o n t r~iln put C, clock and outputs a,b,c.

ii) If C=l, oti every positive edge of ihe 'clock the output changes in the sequence:

000- 00 1; 0 1 1 - 1 1 1 - 000 and ;epeats.

iii) If C=O: the circuit holds in the present state i.e. in the same state.